1. Field of the Invention
The present invention relates to a memory circuit. The present invention also relates to a semiconductor device including a cache memory including the memory circuit.
2. Description of the Related Art
In recent years, technical development on high-speed operation has been actively conducted in semiconductor devices including central processing units (also referred to as CPUs) and the like.
For example, a technique in which storage capacitance is increased using a cache memory at the same time as suppressing a decrease in the CPU's operating speed is known.
A cache memory has a function of temporarily storing data in a main memory. The CPU operation is faster than the main memory's response. Thus, by using a cache memory for forming a cache unit, the CPU is not in a wait state and a decrease in the operation speed can be suppressed. In addition, the following technique has been known in recent years: a cache unit has a hierarchical structure of a Level 1 cache, a Level 2 cache, or a Level 3 cache depending on the frequency of using stored data, in order to further suppress a decrease in the CPU's operating speed.
The cache memory is composed of a memory circuit such as a static random access memory (SRAM) (see Patent Document 1, for example).
As another technical development on high-speed operation, down-scaling of semiconductor elements such as transistors is conducted in order to improve the operation speed and the integration of CPUs. For example, a semiconductor device having a semiconductor element with a gate length of 30 nm is manufactured.
However, down-scaling of CPUs increases a leakage current of transistors and power consumption. Conventionally, most of the power consumption of CPUs was power used for arithmetic operation; however, the leakage current of transistors accounts more than 10% of the power consumption due to down-scaling.
For this reason, a method in which power voltage supply to an unused circuit is cut off by using a power gate which is a power supply control switch is supposed to reduce power consumption. This method is also supposed to reduce power consumption in a cache memory.